1. Field of the Invention
The present invention relates to an inter-phase skew detection circuit for detecting a phase offset (skew) for multi-phase clocks, an inter-phase skew adjustment circuit employing the inter-phase skew detection circuit, and a semiconductor integrated circuit (LSI) employing the inter-phase skew adjustment circuit.
2. Description of the Related Art
Multi-phase clocks (clock signals) such as 2-phase clocks or 4-phase clocks are used in a semiconductor integrated circuit (called an “LSI”). After the clock signals are distributed within an LSI, an offset (called “skew”) from an ideal value for the inter-phase between different phases occurs due to a difference between distributed -delays within the relevant clock tree, or a delay error caused by a dispersion between manufactured clock distribution drivers. Therefore, a delay margin is reduced, which may cause an erroneous, operation.
In consideration of the above, a function for uniformizing the phase difference between different phases during generation from a clock signal to multi-phase clocks has been proposed (see, for example, Patent Document 1, FIG. 1, paragraph [0035]).
As a relevant technique, a data edge-to-clock edge phase detector has been proposed (see, for example, Patent Document 2). Patent Document 2 discloses a method and a corresponding system for detecting a skew between a data signal and a reference clock signal so that the data signal is in synchronism with the reference clock signal (see FIG. 1, and paragraphs [0012] and [0013] of Patent Document 2).
As another relevant technique, a clock skew, measurement apparatus has been proposed (see, for example, Patent Document 3). Patent Document 3 has an object to provide a clock skew measurement apparatus so as to efficiently measure a skew between on-chip clock signals (see lines 4 to 19 on page 2 of the specification of Patent Document 3).    Patent Document 1: Japanese Unexamined Patent Application, First Publication No. 2002-163034.    Patent Document 2: Published Japanese Translation, No. 2008-541657, of PCT International Publication, No. WO 2006127068    Patent Document 3: Pamphlet of PCT International Publication, No. WO 03/036313
In an ideal state for the multi-phase clocks, there is a “360/N” phase difference between adjacent signals belonging to N-phase clock signals. In order to measure a skew from “360/N”, reference clocks having such “360/N” phase difference are required. However, no device for accurately implementing such reference clocks at the end of a clock distribution system is known.